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Verification Engineer Interview Questions
3,721 verification engineer interview questions shared by candidates
He asked me about Data hazards, Instruction sets , Examples of branch prediction , 32 bit adder design. WAR and RAW Instruction examples. Basic Computer architecture questions.
it was not that difficult.
Covered the resume.
All the questions were pretty basic and were related to fundamentals of logic design and verification.
Describe how CAM (content addressable memory) works.
Identify the circuit that the given FSM corresponds to, timing based questions, optimize the circuit. FSM was that of a simple counter
What challenges do you see in a cross-team effort for a verification project?
Know everything in c++. Virtual functions/class. Polymorphism. Be ready to write code on the spot
They gave me a design problem and kept on telling me to optimize it
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