Q: How to calculate the depth of FIFO?
Verification Engineer Interview Questions
3,721 verification engineer interview questions shared by candidates
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How to make nor gate using two input mux
Describe what tests need to be done on memory
Explain how setup time and hold time violations occur and what can be done to reduce there occurence? What is metastability?
Difference between latch and flip flop, Sequence detector design, Divide by n circuits for different values of n. Few scenarios of assertions, Verilog code for positive edge detector and negative edge detector, Setup and Hold time and few codes to debug and provide output. basic questions in digital on mux, questions on code synthesizing
UVM, SystemVerilog and PCIe protocol
Draw two stage CMOS amplifier explain its operation derive gain and output impedance number of poles and zeros and find them comment on stability and frequency compensation
write constraint for memory system
1. introduction and motivation 2. what's the verification life cycle and some behavioral questions 3. this's more like the data scientist introduce their process to me 4. write a python program that when it's intialized the anamal in the zoo could do it's action 5. behavioral questions
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