General verification questions and also questions based on my CV
Verification Engineer Interview Questions
3,721 verification engineer interview questions shared by candidates
What did you learn from project X?
Digital electronics,Static Timing Analysis, Verilog
Simple questions on verilog and system verilog.
Digital design verilog etc etc etc
Associative array, coverage, randomization, ahb offset address.
If two capacitors charged upto diifferent voltages were connected in parallel, what would be the voltage when measure across each?
DO178, Testing concepts, Verification and validation concepts.
She asked if I was good with people, because they get a lot of disgruntled customers.
Write Polymorphism code , Project discussion
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