The questions were mainly SV,OVM, UVM based questions. Also asked about all of the project details of mine. They also asked some digital electronics questions & some fundamental electrical issues.
Verification Engineer Interview Questions
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What would I like to work on?
Related to project questions. task and function questions.
1- what is PLL and how it used to generate frequency larger than the reference frequency. 2- questions related to different verilog topics that includes delays, clock dividers, ...
blocking vs. non blocking
difference between function and task
Questions asked were based on the profile and the experience
The way I handle the projects from scratch and the challenges I have faced
The questions were walking through some C code and telling them what the output would be as well as two brainteaser-like questions.
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