use non-blocking assignment to implement negative clock triggering SWAP in verilog, read the code
Verification Engineer Interview Questions
3,721 verification engineer interview questions shared by candidates
Even ask me many questions about C++ and OOP.
Systen verilog - uvm questions
2. Describe Walking ones test
Protocol of Low Power design.
some brain teasers
Explanation items on resume, question on PCIE behavior especially LTSSM.
What are the attributes of good quality code?
The interview questions were all pretty expected. Your strengths, weaknesses, how you work under pressure, team work skills etc.
Tell me about a time you had to deal with a difficult patient/ Customer. How did you handle it? What was the out come? What did you learn from it?
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