How do you choose the capacitance of your DAC (inside ADC) in order to mitigate possible capacitor mismatches?
Senior Rf Analog Design Engineer Interview Questions
28 senior rf analog design engineer interview questions shared by candidates
How would you make sure that interstage amplifier do not start oscillating
Circuit with MOS and capacitor, find Vo
Design a two stage differential input single ended output amplifier..
I interviewed with one folk-who is a professor at Vrije Universiteit Brussel and two others whom I didn't even see nor I knew their name.The other two interviewers asked initially about my PhD projects. The main interviewer then showed a complicated circuit and asked me to analyze.
What do you know about memory sharing and coding.
What are the noise sources of MOSFET?
Tricky resistive/Cap network questions
tuned circuit frequency responce and cutoff frequency equations
Basic RF questions: Mixers, LNA, Oscillators. Signal Processing questions
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