Some verification related questions were asked?
Cpu Design Engineer Interview Questions
222 cpu design engineer interview questions shared by candidates
Explain the max delay and min delay violations for timing paths in a circuit?
out-of-order execution questions
Interrupts, virtual memory, prefetch
Introduce yourself 5 pipeline stages, the type of hazard. how to solve structural hazard, insert NO. of bubbles to solve the data hazard linked list and pointer basic knowledge.What's your plan in 10 years.
Lets talk about the 5 stage pipeline CPU you simulated in school. Walk me through what different kinds of structures are needed. And this kept on going from Instruction Fetch till Instruction Commit.
What is your favorite smart phone feature?
First Phone interview Computer Architecture stuff: OOO, memory dependencies, Piplelining, Fetch stage, Branch Prediction System Verilog: coverage and assertion writing Digital Logic: Implement AND and OR using 2:1 mux Asked to rate myself in C++, System Verilog Second Phone Interview: Similar Comp Architecture questions C program to sort array. Binary search vs Linear Search. Time complexity.
- Asked to describe my C++ projects. - Gave a coding question in C++. Medium Difficulty.
Design a circuit that takes 4 bit BCD as input and has the input times 5 as output
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