Initially the questions were based on my resume. Later some concepts of Verilog, like blocking-non blocking assignments. He asked me to write a small verilog code also.
Verification Engineer Interview Questions
3,721 verification engineer interview questions shared by candidates
Write dynamic array, MUX in Verilog
Write verilog code for asynchronous FIFO, verilog code for FSM.
All questions are based on the work experience and the job requirement
Questions on Design flow, Verilog , SV etc
Factory overiding methods in UVM
Do you familiar with UVM verification method？How's your script writing? (She asked nothing related to semiconductor or Integrated circuits).
How to find the smallest no of two integers without using if else statements
They asked questions related to VLSI concepts, Verilog coding, and basic aptitude problem-solving.
No questions yet, I have not had my interview. The process for applying seemed really easy. I applied 2 days ago and received a response yesterday. I have my interview next week.
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