Skip to contentSkip to footer

Verification Engineer Interview Questions

Salaries
Interviews

3,721 verification engineer interview questions shared by candidates

1. Write a Verilog code to generate a clock signal at a certain frequency. (a lot of Verilog basic problems) 2. draw a CMOS logic gate 3. Why do you want to be a DV person? 4. What is the most interesting class you took? 5. Other real-life related engineering problems (related to SNR)
avatar

RF Verification Engineer

Interviewed at Qualcomm

3.8★
Apr 21, 2022

1. Write a Verilog code to generate a clock signal at a certain frequency. (a lot of Verilog basic problems) 2. draw a CMOS logic gate 3. Why do you want to be a DV person? 4. What is the most interesting class you took? 5. Other real-life related engineering problems (related to SNR)

There's a circuit diagram of a pulse generator: a 2-input NAND gate with one of the inputs three inverters downstream from the other input, with some propagation delay for each inverter. Given the timing diagram of the input, what does the output look like?
avatar

Design Verification Engineer

Interviewed at Micron Technology

3.9★
Aug 25, 2021

There's a circuit diagram of a pulse generator: a 2-input NAND gate with one of the inputs three inverters downstream from the other input, with some propagation delay for each inverter. Given the timing diagram of the input, what does the output look like?

Viewing 1281 - 1290 interview questions

Glassdoor has 3,721 interview questions and reports from Verification engineer interviews. Prepare for your interview. Get hired. Love your job.