Asyn FIFO and UVM detail Like YOU HAVE TO CODING IT.
Verification Engineer Interview Questions
3,721 verification engineer interview questions shared by candidates
The first question was to make from mix the function f=(abc’)’. After this I was asked to build a 4 to 1 mux from 2to1 muxes. Then I was asked about registers and they wanted me to build a FIFO.
Given Axi related specification and asked me to ask the questions related to specification.
verilog basic, C++,C basics
How can your experience help the team?
describe MIPS CPU
write merge sort in C code
implement sort array, in your way
Review resume, things you have done, technology you work with, UVM,
Tell me about your self. Come up with a test case for a specific user need
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