They asked me about my internship experience.
Verification Design Engineer Interview Questions
3,722 verification design engineer interview questions shared by candidates
Discussed C++ Pointers. I was not expecting that topic. Also, Async Fifos, Dynamic Arrays in SV.
digital circuits and verilog , c language
A question about a house with 4 light bulbs
Bjt. Current. Voltage. Electronics etc
Read after write sequence implementation
Given an error message, what could be the issue.
Virtual Methods , Virtual classes and their difference in system verilog
Object overriding and overloading. Callbacks, mailboxes and semaphores
Questions around GPU pipeline and how it works. Command streamer etc
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