What's the 2 principle of Cache.
Validation Analyst Interview Questions
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comp arch. pipeline. etc
Explain memory hierachy and basic of oop
Mostly on Cache, computer system organization, simple logic design questions like or, and using mux, parallel and serial buses, JTAG, ATPG, LFSR, interrupt types, programming languages (Verilog, TCL, and python) basic questions.
write bubble sort algorithm
Cpu Architecture questions like execution cycle -- fetch, decode, execute stages
cache miss, hit, invalidate, flush and other similar topics on cache
Do you have experience in Verilog?
Python basics, linked list-array difference, interrupt polling difference, static members and functions, linked list program, how do you check for memory corruption etc.
What are the causes of timing issue and how do you debug them?
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