1. Difference between FPGA and microcontroller 2. Verilog ,digital electronics 3. Throughput,latency 4. CDC 5. MAC protocol
Senior Vlsi Design Engineer Interview Questions
305 senior vlsi design engineer interview questions shared by candidates
They had asked to use MUX for Logic GATES. Also some basic C questions like prime no., loops. The last is HR just for confirmation.They will ask you for a bond of 3.5 yrs(1st year sal:2lac; 2nd yr:3 to4 lac; 3rd year: 4to 6 lac)
Mostly basics of analog and digital
Question on c mostly on computer architecture
Fsm
Explain fork and join? how mnay threads are formed which you run the code write a verilog code for full adder?
What is vlsi and uvm
Basic VLSI design concepts , verilog , FPGA design flow , Memory management
Circuit drawing Analog electronics related questions
Basic questions about vlsi and digital electronics.
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