1. Write constraints for 32 bit variable,where for each randomization it should only flip any two of the it's bit's..
Senior Verification Engineer Interview Questions
3,723 senior verification engineer interview questions shared by candidates
Given a circular array containing only numbers, by using only writing and reading from the cells of the array and without additional memory, how can you find out the size of the array?
Discuss your research project as part of your self introduction
introduction? Digital combinational question? Sequential? verilog basics, operators,clock generation etc
some of the basic question from verilog and system verilog. questions from constraints and assertions. questions from STA. they will explain a model or a block you have to write the code for that
Assertions
C, Verilog, Digital design, CMOS tec
How does a JTAG probe work
The Interview was simple. 1) First he asked me to introduce myself. 2) They asked me basics fundamental questions on Digital Electronics i.e, Multiplexer, Flip Flop. 3) Questions on OOPs concepts -: Abstraction. Encapsulation. Inheritance. Polymorphism. 4) Two logical questions Actually they wanted a experience guy at that time they was not interested in fresher.
1. Coding 2. Technical questions on testing
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