1) C++ code to set the matrix MxN to zero if any element in MxN is zero. (leetcode medium question) 2) write constraint to set 32 bit address to be word aligned and 1kb in length
Senior Design Verification Engineer Interview Questions
3,721 senior design verification engineer interview questions shared by candidates
For the first screening round, all questions were based on out-of-order execution CPU. For the final interview, In 1st round, I was asked questions on out-of-order execution CPU 2nd round on cache and virtual memory 3rd round had one coding question based on queues and cache-related questions
Print smallest of three numbers
how to design a FSM using switch-case / shift register
Verification plan of any given design, assertions, what is coverage?
Do you have prior experience with UVM and System Verilog
- Switch 2 variable's content without temporary variable. - Create an array with all the numbers from 0 to Size - 1 in random order and without duplicates.
Draw out the circuit simple verilog code would synthesize to
How to convert hexadecimal to decimal.
Design a circuit that takes 4 bit BCD as input and has the input times 5 as output
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