RTL design verification Tools Verilog
Rtl Design Engineer Interview Questions
272 rtl design engineer interview questions shared by candidates
basic questios about verilog design
How do you build a fifo using ram
Explain the major design work you have worked on.
Some basic stuff. But mainly focus on your resume.
How to implement square root in hardware? Bunch of matlab codes to go over and figure out how to implement a piece of algorithm. Many verilog questions and designs. CORDIC algorithm (as I had experience on that)
CMOS basics, VTC and sram , dram
Dff, mux verilog code Why Nand preferred over Nor ASIC flow
What are some benefits and drawbacks to pipelining a processor?
If number divisible by 3 print "Fizz", divisible by 5 print "Buzz", divisible by 3 and 5 print "Fizz Buzz".
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