Cache, Coherency, Virtual Memory, FSM for Overlapping and non-overlapping sequence detectors. Given the waveforms fora set of 3 signals, deduce the final circuit, find the bug in the system where the system specs are given with the output waveforms, System Verilog and OVM based questions as i had mentioned it on my Resume (through internship).
Some basic verilog and C++ questions.
The reason why you leave your last job
They asked me about my experience with FPGA
Types of leakage in CMOS.
Was there a time you didn't get along with another team member? What happened and how did you resolve it?
List 3 of your weaknesses. How do they affect your quality of work?
What was the biggest technical problem I overcame during my coursework and what made it challenging.
Implement a data packer which packs non-multiple of 4 bytes data streams into a 4 bytes wide RAM
Quite a few questions about oscillators and counters with different scenarios.
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