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Verilog code for D- flip flop
Nothing unexpected.
Past experience. Then asked about what I thought were different servers type or topologies (which I didn't know), then about the general configuration of a server (CPU, northbridge, southbridge, PCH, MCH, etc.). They also wanted to know my experience with Linux and experience with any scripting language.
Absolute fundamental questions were asked in the interview. One needs to be have strong fundamental knowledge in one's domain to crack this interview.
Included questions on basics of Python, C++, and Verilog coding
What logic gate would be best for an adder?
state diagram of sequence detector,questions on setup and hold time,questions on counter,
Describe a 10L PCB stack up design
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