Given a white-board diagram of a block with a FIFO, and verbal description of the block's inputs & outputs, write on the withe board the Verilog or SystemVerilog for the design. I had 15 minutes. Why would you want someone who goes straight to code, with no planning? That usually results in spaghetti code that has to be rewritten.
Is NAND technology part of combinatory or sequentially logic?
tell me about the position in your current compnay
Question related to FSMs, which diagram describes the implementation better.
Introduction. Describe the working and the ranges of a transistor.
How to synchronize a data bus, which has no control. Interviewer was basically trying to poke at the approach to solve that problem. Write clock domain has a burst rate of 80 writes per 100 clocks. Read clock domain reads at a rate of 8 data words in 10 clocks. Data Buffer sizing to not cause overflow Asked to design a 2 request arbiter.
I was asked to write the RTL code for an asynchronous receiver in Verilog
Had to fill in a truth table of a multiplexer
What it a flip flop and what does it do
design a trafffic light controller
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