The asked about past work experience.
Design Verification Engineer Interview Questions
3,722 design verification engineer interview questions shared by candidates
digital, verilog, system verilog
basics of Digital, SV UVM, coverage , assertions,
How do you handle stress situation
questions on digital electronics and verilog
The whole process in the production and verification
technical interview went on for an hour
1. Tell me about yourself. 2. Tell me about your project that you worked on during your studies. 3. Describe MOSFETs in a few words.
How weird are you on a scale of 1-10?
They ask a lot of technical question and they want previous experience to have.
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