rise edge detector, but with delayed out out, and additional config for neg edge
Design Engineer Interview Questions
17,679 design engineer interview questions shared by candidates
how to mitigate effects of meta-stability?
During phone round, questions were asked from my resume and about my projects. During onsite, I had 5 rounds one round digital design questions ....not too tough one round white board solutions of a logical problem using some programming language ( even pseudo code works ) one round, to talk about my favorite project One round , lunch with a teammate ...mostly behavioral One round of scripting / Behavioral questions ( having scripting knowledge is helpful )
What is your weakness?
I was asked a puzzle
Can you draw a circuit to bias the gate of a cascode device? (No mention of supply limitation, threshold voltages, care in tracking PVT variations, or anything else. Just, draw a circuit to bias the gate of a cascode device.)
CMOS basics mostly.
they asked frequency bands and about antenna parameters
They interested in my previous works, they want to know how capable i'm, who contributes to my workplace without any external aid.
What happens when you have a diff pair with a current mirror load on top and a tail current source on the bottom, and you sweep one of the diff pairs gate voltage (VX) from 0 to VDD while holding the other's gate voltage at VDD/2. Plot the two branch currents vs the gate voltage.
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