What's the difference between blocking and non blocking assignments in verilog?
Component Engineer Interview Questions
349 component engineer interview questions shared by candidates
Explain your work and tell me about yourself. Then some details about the work. They appreciated that I carried slides of my current research.
Draw the diagram of a NAND and AND gate.
FSM, STA, Verilog Coding, Design Flow.
Virtual memory,OVM,UVM,SV based questions,verilog.
it more or less covered all the relevant topics
Why I wanted to join that team and job function, technical, analytical and logical thinking questions, brain teasers.
Basically covered VLSI basics, ASIC flow basics (each step) and scripting. Friendly chat for behavioral interview.
Describe r.c. Network
Nothing was really difficult, some of the personality questions caught me off-guard but I guess I did fine.
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