How to make nor gate using two input mux
Asic Verification Engineer Interview Questions
274 asic verification engineer interview questions shared by candidates
how to find if an a number is unassigned in an array?
how do you know you have cover all the case in your testbench
questions on digital electronics and verilog
All kinds of fork joins
Abstarct class vs Interface, inheritance,polymorphism…..etc Observer and Factory DP in details. Log file output analysis. Behavioural questions. Giving basic and simple designs with some specifications and elaborate a strategy to verify it.
Draw the circuit base on the coding provided
show how code coverage and function coverage works. explain with code
APB and AXI protocol explation with all signals.
digital, verilog, system verilog
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