IQ questions
Asic Design Engineer Interview Questions
1,319 asic design engineer interview questions shared by candidates
no many hard questions. Based on resume.
Tell me abuot your self
draw xor gate cmos diagram.
They asked me to write the Verilog code for a D-Flip Flop. I had forgottend verilog, so I asked them if I could write it in pseudo-code. I dervied and wrote the code from first principles. I think this impressed them.
fifo deepth calculation using 1 32-bit adder to add two 64-bit data detect every value 1-bit position for a signal
How to verify your design ？about testbench design ...
Why do you want to work here?
FPGA question
UVM Verilog Verification thinking Logic gates
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