FSM pattern detector, C++ code for fibonacci sequence, swap function, linux based question to replace all instances of a word in a file with another word without opening the file, blocking/non blocking operators in verilog.
Asic Design Engineer Interview Questions
1,319 asic design engineer interview questions shared by candidates
Mix of technical and behavorial. Verilog basics, RTL, STA, etc.
Comp arch, C++, OOPS, Verilog, STL
Formal Verification, Assertions based questions based on the resume and projects
describe what is virtual function. and difference between that and pure virtual function?
difficult
Define setup and hold time.
Is LPDDR5 PHY backward compatible?
Questions on Low power design.
explain and draw circuits/diagrams from projects on resume
Viewing 471 - 480 interview questions