I applied online, three weeks later I got a phone interview with a staff engineer. This position is related to the power saving. All the questions are talking about CDC and low power design. The interview lasted 30 mins. Two weeks later, I got the onsite interview invitation.
Interview questions [1]
Question 1
Personal research, DVFS, CDC, metastable, asynchronous FIFO, synchronizer, level shifter, clock gating, power gating, dynamic power, leakage power.
I applied through college or university. The process took 3 weeks. I interviewed at Qualcomm (Toronto, ON) in Feb 2019
Interview
I applied through university career fair, there they asked me to explain one of the projects I had done and how I rate my verilog. Then after 3 weeks they emailed me to set phone interview. On the phone interview they explained what roles are they looking for and a little about my background and then series of technical questions about clock domain crossing, setup and hold time, clock skew
Interview questions [1]
Question 1
In ASIC design is hold time more critical of setup time?
I applied online. The process took 4 weeks. I interviewed at Qualcomm (San Diego, CA) in Jan 2019
Interview
Phone Interview directly got a call on 3 rd day without any schedule of phn interview. very surprised by the timing as well around 4.30 PM. interview lasted for over 30 min. not sure where it went wrong. received response the next day.